HF Vapor Phase Etcher


HF Vapor Phase Etcher (VPE series)

The VPE consists of a reaction chamber and a lid. A heating element is integrated in the lid. It controls the temperature of the substrate to be etched. Wafer clamping can be achieved in two ways: Wafers can be clamped mechanically by using the clamping ring. The screwing is done from the backside of the apparatus, which is never in contact with the Hydrofluoric acid (HF) vapor. The 3 nuts are easy to handle with protection gloves. The other option is electrostatic clamping. Single chips (longer than 10 mm) as well as wafers can be clamped to the heating element. The backside of the wafer is protected from etching.



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VPE product brochure (PDF).





VPE100 with an E-chuck (electrostatic chuck).


Liquid HF is filled into the reaction chamber. The reaction chamber is closed with the lid. The HF vapor is created at room temperature and the etching process starts spontaneously. The etch rate is controlled by the wafer temperature that can be adjusted from 35 °C to 60 °C.





After processing, the acid can be stored in a reservoir for re-use in a sealable container. Liquid transfer is simply done by lowering the communicating reservoir with a handle. Due to gravity, the acid flows into the reservoir and can be closed by two valves. Refilling the reaction chamber is done by opening the valves and lifting the handle. The acid flows into the reaction chamber. The acid can be re-used for multiple etchings until it has to be replaced. The VPE system has a small footprint and can easily be integrated into an existing flow box.


The VPE is available in various sizes and with a range of optional accessories. Here, we show the E-chuck as well as the mechanical chip clamping solution (Ø 150 mm).



Temperature-controlled Reaction Chamber (TRC )

The etch rate of silicon dioxide varies slightly with the temperature of the liquid HF in the reaction chamber. The temperature of the HF depends on the ambient temperature of the clean room. Additionally, the HF heats during long etching processes, which results in an increasing etch rate from wafer to wafer until the system has stabilized.

To stabilize the etch rate, we have a reaction chamber with temperature controlled liquid HF. The temperature of the HF can be adjusted with an additional controller. Heating the HF acid above a threshold temperature allows to keep the temperature stable during the etching process.


VPE150-TRC with an E-chuck (electrostatic chuck).


VPE150-TRC with a mechanical chuck (mounted with a full wafer).




Technology: vapor phase etching

First experiments on vapor phase etching were carried out by Holmes & Snell in 1966 [1]. They observed that silicon dioxide on a wafer is etched with a comparable etch rate even when the wafer is not in the etch bath but close to. Helms & Deal established that the role of water is to provide a condensed solvent medium for the HF on the surface. Offenberg et al. [2] proposed a two step reaction where first the oxide surface is opened by formation of silanol groups by adsorbed water (H2O). Subsequently silanol groups are attacked by the HF:

SiO2 + 2 H2O → Si(OH)4
Si(OH)4 + 4 HF → SiF4 + 4 H2O




This chemical equation shows that water acts as initiator of the etching process as well as reactant. This fact suggests that the etching process can be temperature controlled in order to maintain in equilibrium the amount of water needed to initiate the process and the amount of reactant water. In idonus' Vapor Phase Etcher, this equilibrium is achieved by heating the wafer. The water film on the wafer is evaporated at moderate temperatures. The etch rate decreases with increasing temperature and stops completely at temperatures above 50 °C. Stiction-free MEMS release is achieved at etch rates around 5 µm/h.


For further information, please ask our skilled team for assistance.




[1] P. J. Holmes and J. E. Snell, Microelectronics and Reliability (Pergamon, New York 1966), Vol. 5, p. 337.
DOI: 10.1016/0026-2714(66)90162-4

[2] M. Offenberg, B. Elsner, and F. Lärmer, "Vapour HF etching for sacrificial oxide removal in surface micromachining," Extended Abstracts: Electrochem. Soc., Fall Meeting (Miami Beach) vol. 94-2, pp. 1056-7, 1994.




MEMS stiction

Silicon dioxide is often used as a sacrificial layer for micromachined structures. For example, Deep Reactive Ion Etched (DRIE) devices on Silicon on Insulator (SOI) wafers are often released in liquid Hydrofluoric acid (HF). After rinsing the wafer in DI water the surface tension of water destroys the liberated structures or the structures stick to each other.

This unintentional adhesion problem is known as:

stiction, a porte-manteau word constructed from sticking and adhesion.


Micrographs of MEMS comb drives illustrating the problem of stiction.

Solution to stiction: HF vapor with the idonus VPE

Etching silicon dioxide in HF vapor is a quasi-dry process. Due to the humidity in the HF vapor atmosphere, a very thin water film is present on the wafer. HF is absorbed and etches the silicon dioxide (SiO2). During the reaction, Silane and water is produced. The Silane escapes in the gas phase. It is interesting to see that in this reaction water acts as an initiator and is produced by the process itself. In heating the substrate, the etch rate can be adjusted by controlling the amount of water on the surface. At etch rates of 4-6 μm/hr most structures can be released without sticking. The etching progress and homogenity are shown in the following pictures.


HF etching process

Homogeneity of the HF etching observed during the process.


Examples of applications

  • Stiction-free MEMS release
  • Structure thinning
  • Dicing-free release of structures on SOI substrates
  • Etch-rate adjustable from 0 to about 30 μm/h
  • Single side SiO2 etching (back-side protected during process)

Useful references

There are dozens of scientic publications that cite the idonus VPE in their material and methods. We provide hereafter a selected list of these papers.

Metal assisted chemical etching of silicon in the gas phase: a nanofabrication platform for X-ray optics,
Lucia Romano, Paul Scherrer Institut (PSI), Villigen, Switzerland.
Nanoscale Horizon, Volume 5, Issue 5, 2020, pp. 869-879.
DOI: 10.1039/C9NH00709A

"Anisotropic Etching of Pyramidal Silica Reliefs with Metal Masks and Hydrofluoric Acid," R. Kirchner et al.
Small, Volume 16, Issue 43, Oct. 2020, 2002290.
DOI: 10.1002/smll.202002290

"Combined Al-protection and HF-vapor release process for ultrathin single crystal silicon cantilevers," S. Mouaziz et al., Microelectronic Engineering, Volume 83, Issues 4-9, April-September 2006, pp. 1306-1308.
DOI: 10.1016/j.mee.2006.01.218

"Etch stop materials for release by vapor HF etching," T. Bakke (Fraunhofer IPMS, Dresden, Germany), 16th MME Workshop 2005, Goeteborg, Sweden.

"Quasi-dry release for Micro Electro-Mechanical Systems," M. Zickar, 2005, SAMLAB, Institute of Microtechnology (IMT), University of Neuchâtel, Switzerland.


A Clean wafer-scale chip release process without dicing based on vapor phase etching, T. Overstolz, SAMLAB, Institute of Microtechnology (IMT), University of Neuchâtel, Switzerland.
17th IEEE Int. Conf. on Micro Electro Mechanical Systems, January 25-29, 2004, Maaastricht, The Netherlands.
DOI: 10.1109/MEMS.2004.1290685



Illustrations with micrographs

Release of comb drive structures
Stiction-free release of comb drives with 1 μm gap between adjacent comb fingers.
[source: idonus sàrl]

Structure thinning
Consecutive oxidation and HF VPE enables the fabrication of sub-micron diameter torsion beams.
[source: IMT, University of Neuchâtel]

Dicing free Release of Optical MEMS
Intelligent double sided deep reactive ion etching enables dicing free release of chips on wafer level.
[source: IMT, University of Neuchâtel]

Isle structures
Timed etching allows the fabrication of isle structures (bright) that are only suspended by the remaining SiO2. The darker structures are released.
[source: IMT, University of Neuchâtel]

Etch rates of small openings
The holes were dry-etched into 0.5 μm of polysilicon deposited on 1 μm of thermal SiO2. The etch rate of the sacrificial SiO2 depends on the diameter of the opening. Neither sticking nor "bad wetting" (liquids that do not diffuse into small holes) of the small openings occurred.
[source: idonus sàrl]

Photonic bandgap
Nanometric membranes on thin sacrificial layers can easily be released
[source: IMT, University of Neuchâtel]

Thin film applications
0.5 μm thick polysilicon beams released on 1 μm thermal SiO2: The width of the beams is 10 μm the length varies from 100 to 500 μm.
[source: idonus sàrl]

Aluminum structures
Aluminum structures on SiO2 can be released. The high stress in the aluminum cantilevers causes a strong curling. The 0.5 μm thick aluminum layer was deposited on 1 μm thermal SiO2.
[source: idonus sàrl]

Polymer-ceramic MEMS bimorph
The oxide hard mask covering the structures (paddle, thermal isolation linkages, and anchors) is visible prior to HF etching and is yellow in color. Once etched away, it reveals the polysilicon beneath. After completion of the etching of the sacrificial layer, the inner bimorph beams and the thermal isolation regions are released and bend.
[source: C.G. Warren / UC Berkeley ]

Click on the illustration to watch a short animation of this HV vapor release.

Silicon nanowires
Ultra-high aspect ratio nanowires were obtained by HF vapor etching with the idonus VPE by researchers from the Paul Scherrer Institute (PSI).
DOI: 10.1039/C9NH00709A
[source: L. Romano / PSI, 2020]

See our dedicated newsletter (06/2020)

SOI micromotor
This 3-phase electrostatic rotary stepper micromotor was fabricated with SOI technology using a single mask. For this purpose, moving structures were patterned with etch holes to ensure complete etching of the buried oxide layer (SiO2) by vapor HF (using the idonus VPE 100).
DOI: 10.1109/ JMEMS.2012.2189367
[source: M. Stanczl and C. Yamahata / EPFL, 2012]

Click on the illustration to watch a short animation of this MEMS device at work.


HF vapor phase release service for MEMS

We can offer a release service for MEMS wafers as well as single chips. All the manipulations are carried out in a cleanroom in Hauterive, Switzerland.

Since every application is different, please contact us directly to discuss the release of your MEMS.




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If you are interested in one of our products, please contact us to get a quotation (either through one of our sales partners, or directly to our headquarters).

If you feel that one of our standard products would need adaption work to suit your application, please do not hesitate to ask us for advice on engineering work. We can find solutions.